Rudolf Usselmann compared three SoC buses in OpenCores SoC Bus Review mainly for determining which architecture best suits OpenCores. The article compares IBM CoreConnect, ARM AMBA and Silicon Corp's WISHBONE architectures.
More comparisons are here and here.
Tuesday, September 25, 2012
x86 vs. ARM: Architectural Differences
x86:
1. CISC (Complex Instruction Set)
2. Not load-store architecture
3. Variable length instructions
ARM:
1. RISC (Reduced Instruction Set)
2. Load-Store architecture, meaning only load and store instructions can access memory.
3. Fixed length instructions. Therefore, code compiled in ARM are generally of larger code size than x86.
1. CISC (Complex Instruction Set)
2. Not load-store architecture
3. Variable length instructions
ARM:
1. RISC (Reduced Instruction Set)
2. Load-Store architecture, meaning only load and store instructions can access memory.
3. Fixed length instructions. Therefore, code compiled in ARM are generally of larger code size than x86.
Saturday, September 15, 2012
Portland Maker Faire 2012
I volunteered in Intel Labs booth at Portland Maker Faire 2012. Fun time working on Makey Makey with Jay Silver.
And I learned how to solder!
And I learned how to solder!
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